ا.م.د.عاصم مجيد مرشد
السيرة المهنية والعلمية
الاسم الثلاثي: عاصم مجيد مرشد
البيانات الشخصية:
الجنسية: عراقية
تاريخ الميلاد: 1/7/1965
العنوان: كركوك / داقوق
البريد الالكتروني: عنوان البريد الإلكتروني هذا محمي من روبوتات السبام. يجب عليك تفعيل الجافاسكربت لرؤيته.
المؤهلات العلمية: شهادة الدكتوراه / دكتوراه هندسة الالكترونيك
الجامعة، القسم (تاريخ الحصول عليه):الجامعة الملية الاسلامية/كلية الهندسة والتكنولوجيا
/ قسم هندسةالالكترونيك والاتصالات 7/6/2013
الخبرة العملية:
|
ت |
اسم المادة |
المرحلة |
الكلية |
القسم |
السنة |
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1 |
هياكل متقطعة |
الاولى |
العلوم |
الحاسوب |
2004 - 2008 |
|
2 |
نظرية احتسابية |
الثانية |
العلوم |
الحاسوب |
2005 - 2008 |
|
3 |
فيجوال بيسك |
الثالثة |
العلوم |
الحاسوب |
2006 - 2008 |
|
4 |
الحاسوب |
الاولى |
العلوم |
علوم الارض |
2005 - 2006 |
|
5 |
الحاسوب |
الاولى |
التمريض |
الثانية |
2007 - 2008 |
|
6 |
هياكل متقطعة |
الاولى |
العلوم |
الحاسوب |
2013 - 2015 |
|
7 |
نظرية احتسابية |
الثانية |
العلوم |
الحاسوب |
2013 - 2015 |
|
7 |
الحاسوب |
الثانية |
العلوم |
علوم الحياة |
2013 - 2016 |
|
8 |
تصميم المنطق |
الاولى |
العلوم |
الحاسوب |
2015 - 2017 |
|
9 |
تصميم المنطق |
الاولى |
علوم الحاسوب وتكنولوجيا المعلومات |
الحاسوب |
2017 - 2018 |
|
10 |
الحاسوب |
الاولى |
العلوم |
الرياضيات |
2018 - 2019 |
التدريب:
|
Date |
Venue |
Title |
No. |
|
( 9 – 22) November, 2007 |
KTNET and the Korea International Cooperation Agency (KOICA) of the Republic of Korea |
Training program for the Establishment of Infrastructure of 18 University in Iraq
|
1 |
|
(24-28) June, 2013 |
IIT Bombay , India |
20th INUP (Indian Nano electronics users programed) Hands-on Training Workshop on Nanofabrication Technologies |
2 |
البحوث المنشورة:
|
Title |
No. |
|
Steganography: Hiding Text Within Image, Kirkuk University Journal Scientific Studies, Vol. 3, No. 2, pp. 70-87, 2008.
|
1 |
|
VLSI Architecture of Fuzzy Logic Hardware Implementation: a Review, Springer - International Journal of Fuzzy Systems, Vol. 13, No. 2, pp. 74-88, June 2011.
|
2 |
|
A Novel VLSI Architecture for a Fuzzy Inference Processor using Triangular-Shaped Membership Function, Springer - International journal of Fuzzy Systems, Vol. 14, No. 3, pp. 345-360, Sep. 2012.
|
3 |
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A Novel VLSI Architecture for a Fuzzy Inference Processor using Gaussian-Shaped Membership Function, Journal of Intelligent and Fuzzy Systems, Vol. 24, No. 1, pp. 5-19, 2013.
|
4 |
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A Novel Multi Membership Function Based VLSI Architecture of a Fuzzy Inference Processor, Springer - International journal of Fuzzy Systems, Vol. 16, No. 4, pp. 468-482, Dec. 2014.
|
5 |
|
FPGA Implementation of Mean – Max Membership based Defuzzifier Unit, Kirkuk University Journal/Scientific Studies (KUJSS), Vol.10, Isuue 3, pp. 79-91, Sep. 2015.
|
6 |
|
Charge Plasma Based Bipolar Junction Transistor on Silicon on Insulator, Springer – Transactions on Engineering Technologies, pp. 219–229, 2015. |
7 |
|
Carbon Nanotube Based Operational Transconductance Amplifier: A simulation study, Springer – Transactions on Engineering Technologies, pp. 231–242, 2015. |
8 |
|
Simulation Study of a Novel High Performance Oxide Engineered Schottky Collector Bipolar Transistor, Springer – Transactions on Engineering Technologies, pp. 253-262, 2015. |
9 |
|
Center of Sums based Defuzzifier Unit VLSI Architecture, Tikrit Journal of Pure Science,Vol.21, No. 1, pp.87-94, Jan. 2016.
|
10 |
|
Direct Torque Control of Induction Motor with Matrix Converter, Journal of Engineering Science and Technology Review, Vol.9, No.2, pp.50-58, 2016.
|
11 |
|
Center of Largest Area Defuzzifier Unit VLSI Architecture, Tikrit Journal of Pure Science,Vol.21, No. 6, pp.160-166, Sep. 2016.
|
12 |
|
Architectural Design of Fuzzy Inference Processor using Triangular-Shaped Membership function, in proceeding of IEEE International Conference On Open System, Malaysia, Langkawi, 25-28, September, 2011.
|
13 |
|
A Novel Fuzzy Inference Processor using Trapezoidal-Shaped Membership function, in proceeding of IEEE International Conference On Open System, Malaysia, Langkawi, 25-28, September, 2011.
|
14 |
|
A Novel VLSI Architecture of a Defuzzifier Unit for a fuzzy Inference processor, in proceeding of IEEE International Conference Of Advanced Electronic Systems, India, Pilani, 21-23, September, 2013.
|
15 |
|
A Novel VLSI Architecture of a Multi Membership function based Max-Min calculator circuit, in proceeding of IEEE International Conference Of Advanced Electronic Systems, India, Pilani, 21-23, September, 2013.
|
16 |
|
A Novel VLSI Architecture of a Weighted Average Method based Defuzzifier Unit, in proceeding of IAENG International Multi Conference of Engineers and Computer Scientists, Hong Kong, 12-14, March, 2014.
|
17 |
|
Design of a Novel High Gain Carbon Nanotube based operational Transconductance Amplifier, in proceeding of IAENG International Multi Conference of Engineers and Computer Scientists, Hong Kong, 12-14, March, 2014.
|
18 |
|
A Novel High Performance Nanoscaled Dopingless Lateral PNP Transistor on Silicon on Insulator, in proceeding of IAENG International Multi Conference of Engineers and Computer Scientists, Hong Kong, 12-14, March, 2014.
|
19 |
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High Performance Oxide Engineered Lateral Schottky Bipolar Transistor, in proceeding of IAENG International Multi Conference of Engineers and Computer Scientists, Hong Kong, 12-14, March, 2014.
|
20 |
|
High performance carbon Nanotube based Cascade operational Transconductance Amplifier, in proceeding of the World Congress on Engineering 2014 Vol. I, WCE 2014, July 2 - 4, 2014, London, U.K.
|
21 |
|
A novel High Performance Nanoscaled Dual Oxide Doping less Tunnel field Effect Transistor, in Proceeding of the World Congress on Engineering 2014 Vol. I, WCE 2014, July 2 - 4, 2014, London, U.K.
|
22 |
|
Schottky barrier based compact transmission gate: a simulation study, in Proceeding of IEEE 3rd International Conference on Devices, Circuits & Systems, India, Coimbatore 3-5 March 2016.
|
23 |
|
A novel hybrid doping based SOI MOSFET, in Proceeding of IEEE 3rd International Conference on Devices, Circuits & Systems, India, Coimbatore 3-5 March 2016.
|
24 |
|
Charge plasma based Partial-Ground-Plane-MOSFET on Selective Buried Oxide (SELBOX), in Proceeding of IEEE International Conference on Silicon On Insulator, U.S.A., San Francisco, 10-13 Oct. 2016.
|
25 |
|
Polarization Engineered Enhancement Mode High Breakdown Voltage GaN CAVET, in proceeding of the 9th IEEE GCC Conference & Exhibition, Bahrain, Manama, 8-11 May, 2017.
|
26 |
|
High performance Carbon Nanotube based folded Cascode Operational Transconductance Amplifiers, in Proceeding of IEEE International Conference on Multimedia, Signal processing and Communication Technology (IMPACT 2017), India, Aligarh 24-26 Nov. 2017.
|
27 |
أخرى
|
|
No. |
|
Certificate of Merit for the 2014 IAENG International Conference on Electrical Engineering, for the paper entitled," High Performance Oxide Engineered Lateral Schottky Bipolar Transistor".
|
1 |
|
Certificate of Best Paper for the IEEE International Conference on Multimedia, Signal processing and Communication Technology (IMPACT 2017), for the paper entitled, “High performance Carbon Nanotube based folded Cascode Operational Transconductance Amplifiers”.
|
2 |
المعلومات الجامعية
|
ت |
|
|
|
-1 |
الكلية |
العلوم |
|
2- |
القسم |
الحاسوب |
|
3- |
اللقب العلمي |
استاذ مساعد |
|
4- |
الشهادة |
دكتوراه |
|
5- |
التخصص العام |
هندسة الالكترونيك |
|
6- |
التخصص الدقيق |
الالكترونيك الدقيق |
الروابط العلمية :
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Google Scholar: https://scholar.google.com/citations?user=mkiRTvgAAAAJ&hl=ar |
|
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Research Gate : https://www.researchgate.net/profile/Asim_Murshid |
معلومات التواصل مع الأستاذ
عنوان البريد الإلكتروني هذا محمي من روبوتات السبام. يجب عليك تفعيل الجافاسكربت لرؤيته.">شعنوان البريد الإلكتروني هذا محمي من روبوتات السبام. يجب عليك تفعيل الجافاسكربت لرؤيته.
